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7-segment display counter: 0 to 9 counter circuit, live

A 7-segment display counter shows a count from 0 to 9 on a digit display: a decade counter holds the count as a 4-bit BCD number, and a BCD to 7-segment decoder turns that number into the seven segment signals a to g on every clock tick. After 9 the display shows 0 again.

It is two verified circuits joined together. The decade counter, four D flip-flops that count 0000 to 1001 and then reset, feeds its outputs Q3 to Q0 straight into the D3 to D0 inputs of the BCD to 7-segment decoder, and each decoder output drives one segment of the display as well as a probe. The counter is synchronous, so all four bits change on the same clock edge. The live circuit opens with CLR on, showing 0; switch CLR to 0 and the running clock steps the display 0, 1, 2 up to 9 and back to 0. For two digits that count 00 to 59, like the seconds of a clock, see the mod-60 counter.

Big circuit: pinch, scroll or tap + to zoom in, then drag to move around.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

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What you need

Step by step

  1. Build the decade counter: four D flip-flops on one clock, bit k toggling when all lower bits are 1, with the next state forced to 0000 after 9 (TC = Q3 AND Q0) or while CLR is 1.
  2. Build the BCD to 7-segment decoder: one sum of products per segment, for example a = D3 + D1 + D2 D0 + D2' D0'.
  3. Wire the counter outputs Q3, Q2, Q1, Q0 to the decoder inputs D3, D2, D1, D0.
  4. Connect the decoder outputs a to g to the display's segment inputs, and to probes so you can read them as bits.
  5. Switch CLR to 0 and let the clock run: the digit steps 0, 1, 2 up to 9 and wraps to 0.

Seven-segment counter sequence

Clock edgeQ3 Q2 Q1 Q0Digita b c d e f g
CLR000001 1 1 1 1 1 0
1000110 1 1 0 0 0 0
2001021 1 0 1 1 0 1
3001131 1 1 1 0 0 1
4010040 1 1 0 0 1 1
5010151 0 1 1 0 1 1
6011061 0 1 1 1 1 1
7011171 1 1 0 0 0 0
8100081 1 1 1 1 1 1
9100191 1 1 1 0 1 1
10000001 1 1 1 1 1 0

The run checks all seven segment outputs over 13 clocks, through the roll from 9 back to 0, before the page is built. A 1 lights a segment, as on a common-cathode display; for a common-anode display invert the seven outputs. To show 0 to F instead, count with a 4-bit binary counter and use the hex to 7-segment decoder. On a breadboard the same pair is often a 7490 counter chip, live as the 74LS90 decade counter, driving a 74LS47 decoder and a common-anode display.

You can also read the full theory in the lesson on seven-segment displays. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

More builds: Registers and counters

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Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

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Frequently asked

How do you make a 0 to 9 counter with a 7-segment display?

Use a decade (mod-10) counter to hold the count as a BCD digit and a BCD to 7-segment decoder to convert it into segment signals. The counter's four outputs go to the decoder's four inputs, and the decoder's seven outputs go to the display's segments.

Why use a decade counter instead of a plain 4-bit binary counter?

A 4-bit binary counter goes up to 15, and a BCD decoder has no digit for 10 to 15. Resetting after 9 keeps the count in 0 to 9, one decimal digit per counter.

How do you count to 99 on two 7-segment displays?

Use two decade counters, each with its own decoder and display. The ones counter's terminal count, which is 1 at 9, enables the tens counter, so the tens digit steps once each time the ones digit wraps from 9 to 0.

What is the difference between common-cathode and common-anode displays?

In a common-cathode display the segment LEDs share ground, so a segment lights when its input is 1, as here. In a common-anode display they share the supply, so a segment lights when its input is 0 and the decoder outputs are inverted.