32-to-1 multiplexer using 8-to-1 multiplexers, live
A 32-to-1 multiplexer can be built from four 8-to-1 multiplexers and one 4-to-1 multiplexer. S2, S1 and S0 drive all four 8-to-1 muxes, so each picks one input from its group of eight; S4 and S3 drive the 4-to-1 mux, which chooses the group whose output reaches Y.
The five select bits split into a position and a group: the low three bits S2 S1 S0 pick one of eight inputs inside every group, and the high two bits S4 S3 pick one of the four groups. With S4 S3 S2 S1 S0 = 10110 (22), each 8-to-1 mux selects its input 6 (D6, D14, D22 and D30), and S4 S3 = 10 passes the third group, so Y = D22. If only 8-to-1 muxes are available, a fifth one can replace the 4-to-1 mux, with S4 S3 on two of its selects and the third tied to 0. The 8-to-1 blocks are the verified gate-level 8-to-1 multiplexer and the last stage is the 4-to-1 multiplexer, all saved as parts; open the circuit in the lab to look inside. Smaller versions of the same tree: 16-to-1 from two 8-to-1 muxes and 8-to-1 from two 4-to-1 muxes.
Open this circuit in the lab →
What you need
- 4× 8-to-1 MUX: S2 S1 S0 select: D0 to D7, D8 to D15, D16 to D23, D24 to D31
- 1× 4-to-1 MUX: S4 S3 select the group: output Y
Step by step
- Place data inputs
D0toD31, selectsS4toS0and a probeY. - Wire each group of eight inputs into its own 8-to-1 mux and connect S2, S1 and S0 to the selects of all four.
- Feed the four 8-to-1 outputs into a 4-to-1 mux with S4 and S3 as its selects; its output is
Y. - Set S4 to S0 to any number from 0 to 31 and toggle that data input: Y follows it, and no other input changes Y.
Which mux passes which input
| S4 S3 | Group (8:1 mux) | S2 S1 S0 | Y |
|---|---|---|---|
| 00 | first: D0 to D7 | 000 to 111 | D0 to D7 |
| 01 | second: D8 to D15 | 000 to 111 | D8 to D15 |
| 10 | third: D16 to D23 | 000 to 111 | D16 to D23 |
| 11 | fourth: D24 to D31 | 000 to 111 | D24 to D31 |
Before the page is built, all 32 select values are checked on the live circuit with four data patterns each (all 0, all 1, only the selected input 1, only the selected input 0), which shows the selected input reaches Y and no other input leaks through.
You can also read the full theory in the lesson on multiplexers. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
More builds: Selecting, routing and decoding
All 246 build guides, by topic
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the 32-to-1 multiplexer from 8-to-1 muxes in the lab →Frequently asked
How do you design a 32 to 1 mux using 8 to 1 muxes?
Use four 8-to-1 muxes with S2 S1 S0 on all of them, one per group of eight inputs, and a 4-to-1 mux with S4 S3 as its selects to choose the group.
How many 8 to 1 muxes are needed for a 32 to 1 mux?
Four, plus a 4-to-1 mux. With 8-to-1 muxes only, a fifth one can choose the group, using two of its select lines.
How many select lines does a 32 to 1 multiplexer have?
Five, because 2^5 = 32: S4 S3 S2 S1 S0 together give the number of the input that reaches Y.
How many 4 to 1 muxes are needed for a 32 to 1 mux?
Eleven: eight 4-to-1 muxes take the 32 inputs (S1 S0), two more choose among those eight outputs (S3 S2), and an eleventh, using only one of its select lines, chooses between the last two (S4).