Reading Patterson and Hennessy? Build the hardware live
Computer Organization and Design: The Hardware/Software Interface, by David A. Patterson and John L. Hennessy, is a widely used textbook for a first course in computer organization, published by Morgan Kaufmann in RISC-V, MIPS and ARM editions. The RISC-V Edition's second edition (2020) has six chapters: Computer Abstractions and Technology; Instructions: Language of the Computer; Arithmetic for Computers; The RISC-V Processor; Large and Fast: Exploiting Memory Hierarchy; and Parallel Processors from Client to Cloud, with appendices on the Basics of Logic Design, Graphics and Computing GPUs, Mapping Control to Hardware and a Survey of RISC Architectures. This page maps each chapter to lessons and live circuits you can try in digiwleea's free browser lab, as a hands-on companion to the reading.
What the book does best
It explains a computer from the instruction set down: how software turns into instructions, how a processor's datapath and control carry them out, how pipelining and caches make it fast, and why parallel hardware took over. An appendix on the basics of logic design covers the groundwork the processor chapters build on. (digiwleea is an independent project, not affiliated with Morgan Kaufmann, Elsevier or the authors.)
Where digiwleea helps
The book's datapath is a diagram; in digiwleea you can build the pieces and watch them work. In the browser you wire gates from CMOS transistors, then the adders, ALU, registers, memory and control the processor chapter assumes, and finally a small 8-bit CPU that runs a stored program, plus the assembly language behind it, with every part checked against its truth table. It is a much smaller machine than RISC-V, but the fetch, decode and execute it runs, and the control signals that make it work, are the same ideas.
| Computer Organization and Design | digiwleea | |
|---|---|---|
| Format | A textbook (print and e-book), in RISC-V, MIPS and ARM editions | A browser lab, theory lessons and a guided course |
| Processor | A RISC-V (or MIPS or ARM) datapath, single-cycle and pipelined | A small 8-bit CPU you build and program |
| Logic design | An appendix | The starting point: transistors to gates to every block |
| Checks your work | Exercises | Every part checked against its truth table |
| Price | Paid textbook | Free lab and Act I; Premium for the full course |
Chapter by chapter: what to try live
The chapter and appendix titles are the RISC-V Edition's (2nd edition); next to each, the digiwleea lessons and live circuits on the same topics (for the authors' advanced book, see Computer Architecture: A Quantitative Approach):
- 1. Computer Abstractions and Technology. From the transistor as a switch and the MOSFET simulator to CMOS gates, power and performance.
- 2. Instructions: Language of the Computer. Machine code, assembly, addressing modes and branches and loops; decode an instruction in the instruction register.
- 3. Arithmetic for Computers. Two's complement, overflow, the ripple-carry and carry-lookahead adders, the 8-bit ALU, multiplication and Booth's algorithm, division and the IEEE 754 converter.
- 4. The RISC-V Processor. The datapath and control, with live parts: the program counter, register file, hardwired control unit; then pipelining, and the CPU simulator to step a program through.
- 5. Large and Fast: Exploiting Memory Hierarchy. The memory hierarchy, caches and a live direct-mapped cache, and virtual memory.
- 6. Parallel Processors from Client to Cloud. The performance lesson's limits of a single processor are the starting point.
- Appendix A. The Basics of Logic Design. Every block, live: gates, Boolean algebra, multiplexers, decoders, latches, flip-flops and registers.
- Appendix C. Mapping Control to Hardware. The same control done two ways: a hardwired control unit and a microprogrammed one reading its signals from a ROM.
No sign-up is needed to start: open the lab and place your first transistor, or read the free theory course. The account (and the AI tutor) are optional.
More comparisons: Books, courses and projects
See for yourself: build a logic gate from transistors in the simulator, then follow the path from sand to an 8-bit CPU.
Open the digiwleea lab →Frequently asked
Is there a simulator for Computer Organization and Design?
The book's processors run in instruction-set simulators such as RARS or Ripes for RISC-V. To see the gate-level hardware underneath (adders, registers, control), a browser logic simulator such as digiwleea shows those parts live.
What are the chapters of Patterson and Hennessy?
In the RISC-V Edition (2nd edition): Computer Abstractions and Technology; Instructions: Language of the Computer; Arithmetic for Computers; The RISC-V Processor; Large and Fast: Exploiting Memory Hierarchy; Parallel Processors from Client to Cloud; plus appendices including The Basics of Logic Design and Mapping Control to Hardware.
Is digiwleea's CPU a RISC-V processor?
No. It is a small 8-bit teaching CPU with its own short instruction set, built from parts you make in earlier levels. The ideas carry over: instructions as bits, a datapath, control signals, and fetch, decode and execute.
What is the difference between Computer Organization and Design and Computer Architecture: A Quantitative Approach?
Both are by Hennessy and Patterson. Computer Organization and Design is the introductory book on how a computer works; Computer Architecture: A Quantitative Approach is the more advanced book on designing fast processors and systems.