7410 (74LS10, 74HC10): the triple 3-input NAND gate chip, live
The 7410 is a 14-pin chip with three independent 3-input NAND gates: each output nY is 0 only when all three of its inputs nA, nB and nC are 1. The 74LS10 and 74HC10 share the pinout, with VCC on pin 14 and GND on pin 7. This live chip has all three gates.
A 3-input NAND saves a gate wherever three conditions meet: a 2-input NAND chip needs an AND stage first, while one 7410 gate does it at once. It is also the natural gate for sum-of-products logic built from NAND-NAND form, where each product term has three literals. In CMOS a 3-input NAND is three PMOS transistors in parallel and three NMOS in series, one stage like the 2-input CMOS NAND; here each gate is built from a 2-input AND and a 2-input NAND, which gives the same truth table. Mind the pinout: gate 1's output and third input sit on pins 12 and 13, across the chip from its first two inputs. All 512 combinations of the nine inputs are checked before the page is built.
Open this circuit in the lab →
What you need
- 3× 3-input NAND: 1Y from 1A, 1B, 1C; 2Y from 2A, 2B, 2C; 3Y from 3A, 3B, 3C
Step by step
- Power the chip:
VCCon pin 14 andGNDon pin 7 (5 V for the 74LS part; 2 V to 6 V for the 74HC part). - Each gate has three inputs and one output; find their pins in the pinout below.
- Tie every unused input to VCC or GND: a floating CMOS input can drift and draw current.
- Set all three inputs of one gate to 1: its output goes to 0. Any 0 on an input gives 1.
7410 pinout
| Pin | Name | Pin | Name |
|---|---|---|---|
| 1 | 1A | 14 | VCC |
| 2 | 1B | 13 | 1C |
| 3 | 2A | 12 | 1Y |
| 4 | 2B | 11 | 3C |
| 5 | 2C | 10 | 3B |
| 6 | 2Y | 9 | 3A |
| 7 | GND | 8 | 3Y |
3-input NAND truth table (each gate)
| A | B | C | Y |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 |
Pin numbers are for the 14-pin DIP and SOIC packages, from TI's SN74HC10 datasheet, checked 2026-10-25. Each gate is independent; the chip only shares the power pins.
You can also read the full theory in the lesson on the NAND gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
Build more parts from gates
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the 7410 triple 3-input NAND chip in the lab →Frequently asked
What is a 7410 chip?
A 14-pin chip with three independent 3-input NAND gates. VCC is pin 14 and GND pin 7. Each output is LOW only when all three of its inputs are HIGH.
What is the 7410 pinout?
Pin 1 1A, 2 1B, 3 2A, 4 2B, 5 2C, 6 2Y, 7 GND, 8 3Y, 9 3A, 10 3B, 11 3C, 12 1Y, 13 1C, 14 VCC.
How do you use a 3-input NAND as a 2-input NAND?
Tie the unused input to the HIGH level (VCC), or to one of the other two inputs. A HIGH input does not change a NAND's result, so the gate then behaves as a 2-input NAND.
What is the difference between the 74LS10 and the 74HC10?
The same three gates and pinout. The 74LS10 is TTL for a 5 V supply; the 74HC10 is CMOS, runs from 2 V to 6 V and draws less power.