74HC164: the 8-bit serial-in, parallel-out shift register, live
The 74HC164 is an 8-bit serial-in, parallel-out shift register: on each rising edge of CLK every bit moves one place along from QA toward QH, and QA takes A AND B, the two gated serial inputs. A low on CLR clears all eight outputs at once. The 74LS164 has the same pinout. This live circuit is the whole chip.
TI's datasheet puts it this way: "These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse." So tie one of A and B high and use the other as data, or use one as an enable. Unlike the 74HC595, the 164 has no storage register and no 3-state outputs: its outputs change as each bit moves through, which does not matter when the bits pass faster than the eye can see, and that makes it the simpler output expander (the datasheet lists "Output Expander" among its applications). Each stage here is a master-slave D flip-flop with asynchronous clear, the same chain as the 4-bit shift register, eight long, with an AND gate in front for A and B and an inverter for the active-low CLR. The live chip opens with CLR low (all outputs 0) and A = B = 1: set CLR to 1 and turn CLK on and off, and a 1 enters QA and moves along with each rising edge. Before the page is built, a 48-step sequence (clear, shifting with A and B both high or one of them low, a change on A while CLK is high, a clear while CLK is high, and shifting again) is checked on all eight outputs.
Open this circuit in the lab →
What you need
- 8× D flip-flop with clear: the stages QA to QH, all on CLK, each D from the stage before
- 1× AND: the serial data into QA's stage: A AND B
- 1× NOT: the active-low CLR into the flip-flops' clear
Step by step
- Place inputs
A,B,CLKandCLR, and probesQAtoQH. - Chain eight D flip-flops with clear: each Q drives the next D, and every CLK input comes from CLK.
- Feed the first D from A AND B, and every clear from NOT CLR.
- Set CLR = 1 and A = B = 1, then pulse CLK: a 1 enters QA. Set A to 0 and pulse again: a 0 follows it in.
74HC164 function table
| CLR | CLK | A | B | QA | QB to QH |
|---|---|---|---|---|---|
| 0 | X | X | X | 0 | 0 |
| 1 | 0 | X | X | no change | no change |
| 1 | rising | 1 | 1 | 1 | shift |
| 1 | rising | 0 | X | 0 | shift |
| 1 | rising | X | 0 | 0 | shift |
74HC164 pinout
| Pin | Name | Pin | Name |
|---|---|---|---|
| 1 | A | 14 | VCC |
| 2 | B | 13 | QH |
| 3 | QA | 12 | QG |
| 4 | QB | 11 | QF |
| 5 | QC | 10 | QE |
| 6 | QD | 9 | CLR (active low) |
| 7 | GND | 8 | CLK |
X means the input does not matter; shift means QB takes the old QA, QC the old QB, and so on up to QH. The function table and the 14-pin pinout are from TI's SN74HC164 datasheet (SCLS115G), checked 2026-10-25; TI's SN74LS164 datasheet has the same table and pins. The 74HC164 runs from 2 V to 6 V; the 74LS164 is a 5 V part.
You can also read the full theory in the lesson on shift registers. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
Build more parts from gates
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the 74HC164 8-bit shift register in the lab →Frequently asked
What does the 74HC164 do?
It is an 8-bit serial-in, parallel-out shift register. Each rising clock edge shifts the eight outputs one place from QA toward QH and loads A AND B into QA. A low on CLR clears all outputs at once, without the clock.
What is the difference between the 74HC164 and the 74HC595?
The 74HC595 adds an 8-bit storage register with its own clock and 3-state outputs, so its outputs change all at once and can be disabled. The 74HC164's outputs follow the shifting directly, and it has two AND-gated serial inputs and an active-low clear.
What are the A and B inputs of the 74HC164?
Two serial data inputs combined by an AND gate: the bit shifted into QA is A AND B. Tie one high and send data on the other, or use one as an enable, since a low on either shifts in a 0.
How do you chain two 74HC164 chips?
Connect QH of the first chip to A and B (or to A, with B tied high) of the second, and share CLK and CLR. The pair then shifts 16 bits.