Skip to content
digiwleeaTools
LearnGlossaryAboutCheat sheetHow a CPU worksToolsOpen the lab →

7411 (74LS11, 74HC11): the triple 3-input AND gate chip, live

The 7411 is a 14-pin chip with three independent 3-input AND gates: each output nY is 1 only when all three of its inputs nA, nB and nC are 1. The 74LS11 and 74HC11 share the pinout, with VCC on pin 14 and GND on pin 7. This live chip has all three gates.

Three-input ANDs turn up whenever a signal must wait for three conditions at once: a decoder line that needs three address bits, an enable gated by two control signals, or a product term in a sum of products. With 2-input gates that takes two ANDs per term, which is exactly how each gate is built here; the 3-to-8 decoder is the classic place where each output is a 3-input AND. The 7411 has the same pinout as the 7410, its NAND counterpart. All 512 combinations of the nine inputs are checked before the page is built.

Live circuit: click the inputs to toggle them and watch the outputs update. It runs the real simulator, right here on the page.

Open this circuit in the lab →

What you need

Step by step

  1. Power the chip: VCC on pin 14 and GND on pin 7 (5 V for the 74LS part; 2 V to 6 V for the 74HC part).
  2. Each gate has three inputs and one output; find their pins in the pinout below.
  3. Tie every unused input to VCC or GND: a floating CMOS input can drift and draw current.
  4. Set all three inputs of one gate to 1: its output goes to 1. Any 0 on an input gives 0.

7411 pinout

PinNamePinName
11A14VCC
21B131C
32A121Y
42B113C
52C103B
62Y93A
7GND83Y

3-input AND truth table (each gate)

ABCY
0000
0010
0100
0110
1000
1010
1100
1111

Pin numbers are for the 14-pin DIP and SOIC packages, from TI's SN74HC11 datasheet, checked 2026-10-25. Each gate is independent; the chip only shares the power pins.

You can also read the full theory in the lesson on the AND gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.

Build more parts from gates

half adderfull adderhalf subtractorfull subtractor2:1 multiplexer4:1 multiplexerXOR gate from NAND gates2-to-4 decoderSR latchD flip-flopJK flip-flopT flip-flop4-bit shift register4-bit ripple carry adderD latch1-to-4 demultiplexer4-bit magnitude comparator4-bit ring counter4-bit Johnson counter4-to-2 priority encoder4-bit synchronous counter3-to-8 decoder8-to-1 multiplexer4-bit carry lookahead adderhalf adder from NAND gates2-bit comparatorBCD to 7-segment decoder4-bit up/down counterdecade counter2-bit multiplier4-bit ALU4-bit array multiplierNOT, AND, OR and NOR from NANDNOT, OR, AND and XOR from NORfull adder from NAND gatesSR latch from NAND gatesparity generator and checker4-bit adder/subtractorBCD adder4-bit universal shift registermod-6 counter4-bit ripple counterbinary to Gray code converterhalf adder from NOR gatesfull adder from NOR gates4-bit register with parallel load1011 sequence detectorbinary to BCD converterD flip-flop from NAND gates1-bit ALUCMOS inverterCMOS NAND gateCMOS NOR gatePISO shift registerSR flip-flop from NAND gatesBCD to excess-3 code converterHamming (7,4) code encoder and correctortraffic light controller4-bit barrel shifterCMOS AND gateCMOS OR gateCMOS XOR gate1-bit magnitude comparatorhalf subtractor from NAND gatesfull subtractor from NAND gates8-to-3 encoderGray to binary converter4-to-16 decoderfull adder using 4:1 multiplexersedge detectorserial adder4-bit carry-select adder4-bit Kogge-Stone adder4-bit carry-skip adder4x4 Wallace tree multiplier8-bit adderfrequency divider (by 2, 4 and 3)switch debouncer (SR latch)3-bit Gray code counterMealy machine (1011 detector)master-slave JK flip-flop (NAND)half subtractor from NOR gates1-to-8 demultiplexerexcess-3 to BCD code convertervending machine FSM4-bit carry-save adder3-bit synchronous counter (JK)CMOS transmission gatetri-state buffer (CMOS)2-to-1 mux from transmission gatesmod-5 counterflip-flop conversion (JK to D)8-bit ALUdecimal to BCD encoderBCD to decimal decoder4-to-1 mux from 2-to-1 muxesXOR gate from NOR gates4-bit LFSR74LS138 decoderBCD subtractor74181 ALUCMOS AOI gate (AOI21)D latch vs D flip-flop74LS47 BCD to 7-segment decoder74HC595 shift register7400 quad NAND gate chip7402 quad NOR gate chip7404 hex inverter chip7408 quad AND gate chip7432 quad OR gate chip7486 quad XOR gate chip7474 dual D flip-flop74HC165 shift registerCD4017 decade counter74LS283 4-bit adder74LS90 decade counter74HC161 4-bit counter74HC151 8-to-1 multiplexer74HC157 quad 2-to-1 multiplexer74HC139 dual 2-to-4 decoderCD4511 BCD to 7-segment decoder7492 divide-by-12 counter7493 4-bit binary counter74HC244 octal bufferRace-around condition (JK latch)74HC373 octal latch74HC374 octal D flip-flopTurnstile state machine1-to-2 demultiplexerhalf adder using 2:1 multiplexersregister file (4 x 4-bit)digital PWM generatorCD4013 dual D flip-flop74LS76 dual JK flip-flop7410 triple 3-input NAND chip7420 dual 4-input NAND chipCD4011 quad 2-input NAND chipCD4001 quad 2-input NOR chipCD4081 quad 2-input AND chipCD4069 hex inverter chip74HC164 8-bit shift register

Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.

Open the 7411 triple 3-input AND chip in the lab →

Frequently asked

What is a 7411 chip?

A 14-pin chip with three independent 3-input AND gates. VCC is pin 14 and GND pin 7. Each output is HIGH only when all three of its inputs are HIGH.

What is the 7411 pinout?

Pin 1 1A, 2 1B, 3 2A, 4 2B, 5 2C, 6 2Y, 7 GND, 8 3Y, 9 3A, 10 3B, 11 3C, 12 1Y, 13 1C, 14 VCC, the same as the 7410.

How do you make a 3-input AND gate from 2-input gates?

Chain two: AND the first two inputs, then AND that result with the third. That is what each gate on this page does.

What is the difference between the 74LS11 and the 74HC11?

The same three gates and pinout. The 74LS11 is TTL for 5 V; the 74HC11 is CMOS for 2 V to 6 V with lower power.