7420 (74LS20, 74HC20): the dual 4-input NAND gate chip, live
The 7420 is a 14-pin chip with two independent 4-input NAND gates: each output nY is 0 only when all four of its inputs nA to nD are 1. The 74LS20 and 74HC20 share the pinout, with VCC on pin 14, GND on pin 7 and two unconnected pins. This live chip has both gates.
A 4-input NAND answers "are all four of these true?" with an active-low output, which is how a 4-bit pattern, an address or a count is detected: feed each bit straight or inverted and the output goes LOW on exactly one value. A counter that must reset at a given count uses one this way. Here each gate is a chain of 2-input ANDs and a NAND, which gives the same truth table as the chip's single stage. Pins 3 and 11 are not connected, so the two gates are not laid out like the 2-input chips. All 256 combinations of the eight inputs are checked before the page is built.
Open this circuit in the lab →
What you need
- 2× 4-input NAND: 1Y from 1A, 1B, 1C, 1D; 2Y from 2A, 2B, 2C, 2D
Step by step
- Power the chip:
VCCon pin 14 andGNDon pin 7 (5 V for the 74LS part; 2 V to 6 V for the 74HC part). - Each gate has four inputs and one output; find their pins in the pinout below.
- Tie every unused input to VCC or GND: a floating CMOS input can drift and draw current.
- Set all four inputs of one gate to 1: its output goes to 0. Any 0 on an input gives 1.
7420 pinout
| Pin | Name | Pin | Name |
|---|---|---|---|
| 1 | 1A | 14 | VCC |
| 2 | 1B | 13 | 2D |
| 3 | NC | 12 | 2C |
| 4 | 1C | 11 | NC |
| 5 | 1D | 10 | 2B |
| 6 | 1Y | 9 | 2A |
| 7 | GND | 8 | 2Y |
4-input NAND truth table (each gate)
| A | B | C | D | Y |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 0 | 1 | 1 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 0 | 1 | 1 | 1 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 |
Pin numbers are for the 14-pin DIP and SOIC packages, from TI's SN74HC20 datasheet, checked 2026-10-25. Each gate is independent; the chip only shares the power pins.
You can also read the full theory in the lesson on the NAND gate. Prefer to build it yourself from scratch? Open the digiwleea lab and place the gates on the canvas, or start from the logic gate simulator.
Build more parts from gates
Each of these is one step from a transistor to a working CPU. Build every gate from CMOS transistors and work all the way up in the free digiwleea lab, with the free theory reference alongside.
Open the 7420 dual 4-input NAND chip in the lab →Frequently asked
What is a 7420 chip?
A 14-pin chip with two independent 4-input NAND gates. VCC is pin 14 and GND pin 7; pins 3 and 11 are not connected. Each output is LOW only when all four of its inputs are HIGH.
What is the 7420 pinout?
Pin 1 1A, 2 1B, 3 NC, 4 1C, 5 1D, 6 1Y, 7 GND, 8 2Y, 9 2A, 10 2B, 11 NC, 12 2C, 13 2D, 14 VCC.
What is a 4-input NAND gate used for?
Detecting when four signals are all true, for example recognizing one 4-bit value by inverting the bits that should be 0. The output goes LOW only for that value, which suits active-low enables and resets.
What is the difference between the 74LS20 and the 74HC20?
The same two gates and pinout. The 74LS20 is TTL for 5 V; the 74HC20 is CMOS for 2 V to 6 V with lower power.